The present invention relates to a semiconductor device and a method of manufacturing the semiconductor device, and more particularly a semiconductor device featuring the electrode structure of a capacitor and a method of manufacturing the semiconductor device.
In recent years, large-scale integrated circuits (LSIS) have been widely used in the important sections of computers and communication equipment. The performance of the entire equipment is closely related to the performance of each LSI.
Especially in such semiconductor memory devices as DRAMs, as the minimum process dimension decreases, the area of a single memory cell become increasingly small. This makes the capacitor area in a memory cell much smaller.
The smaller memory cell makes the capacitance of the capacitor (storage capacitance: Cs) smaller. The capacitance cannot be made very small because of the sensitivity and errors in software. Namely, as the memory cell area becomes smaller, it is more difficult to secure the necessary capacitance of the capacitor.
To solve this problem, the following two methods have been studied. One method is to form a capacitor three-dimensionally to make the capacitor surface area as large as possible with a smaller cell area, thereby securing the capacitance of the capacitor. The other method is to use an insulating film with high permittivity (what is called a high .epsilon. film) for a capacitor insulating film.
With the coming generation of design rules of the order of 0.15 microns (or the coming generation of 1-Gbit DRAMs), the process of manufacturing complex three-dimensional storage nodes would become more difficult.
Consequently, as for a method of gaining the capacitance of the capacitor, a method of using an insulating film with higher permittivity (a high-permittivity insulating film) than that of an oxide film for the capacitor insulating film is very important. Typical high-permittivity insulating films include a (Ba, Sr)TiO.sub.3 film.
In the case of a (Ba, Sr)TiO.sub.3 film, use of an RU film that presents the conductivity of metal even when oxidized in the course of processing or a stacked film of an RuO.sub.2 film/Ru film has been studied (refer to S. Yamamichi, et al., IEDM Technical Digest, pp. 119-122, 1995).
FIG. 1 shows a sectional view of a conventional stacked DRAM memory cell using a stacked film of an RuO.sub.2 film/Ru film as a storage node.
Explanation will be given according to the manufacturing processes. First, an element isolating insulating film 82 is formed on a p-type silicon substrate 81.
Next, after a gate insulating film 83, a gate electrode (word line) 84, a gate cap layer 85, and a low-impurity-concentration n-type source/drain diffused layer 86 have been formed, interlayer insulating films 87, 88 are deposited and the surface is flattened.
Then, after polycrystalline silicon films 89, 90 have been formed in a storage node contact area and a bit line contact area in such a manner that they are embedded in the areas, a bit line 91 is formed.
Then, after an interlayer insulating film 92 has been deposited and its surface has been flattened, a storage node contact hole is made. In the hole, a high-impurity-concentration polycrystalline silicon film 93 is embedded.
Next, after a TiSi.sub.x (titanium silicide) film 94, aTiN film 95, an Ru film 96, and an RuO.sub.2 film 97 have been formed in that order, this stacked film is patterned by ordinary lithography using photoresist (not shown) and RIE techniques to form a storage node 98. Thereafter, the photoresist is peeled.
Finally, a capacitor insulating film 99 and a plate electrode (e.g., a single layer film of an Ru film or a stacked film of an Ru film/TiN film) 100 which are composed of a high-permittivity insulating film, such as a (Ba, Sr)TiO.sub.3 film, are formed in that order on the entire surface in such a manner that they cover the side face and top face of the storage node 98.
The stacked DRAM using this type of storage node 98, however, has the following problem.
Firstly, because the RuO.sub.2 film 97 with a higher film stress than that in the Ru film 96 occupies most of the storage node 98, the film stress in the storage node 98 becomes higher, resulting in an increase in the leakage current in the capacitor insulating film 99 causes by the film stress.
Secondly, because the TiSi.sub.x film 94, TiN. film 95, Ru film 96, and RuO.sub.2 film 97 have appeared on the side face of the storage node 98, this increases leakage current in the capacitor insulating film 99. The reason for this is that the interface between the TiSi.sub.x film 94 and the TiN film 95, the interface between the TiN film 95 and the Ru film 96, and the interface between the Ru film 96 and the RuO.sub.2 film 97 act as paths for leakage currents.
Lastly, because the corners of the top (RuO.sub.2 film 97) of the storage node 98 have an acute angle of about 90.degree. and electric fields are liable to concentrate there, this increases leakage current in the capacitor insulating film 99.